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;* in case the output is positive when polling starts.
;* Number of words :4
;* Number of cycles :4 per loop. Response time: 3 – 5 clock cycles
;* Low registers used :None
;* High registers used :None
wait_edge1:
sbic ACSR,ACO ;if output is high
rjmp wait_edge1 ; wait
we1_1:
sbis ACSR,ACO ;if output is low
rjmp we1_1 ; wait
;********************* «ɨɠɢɞɚɧɢɟ_edge2» **************************
;* This piece of code waits until the output of the comparator (the ACO–bit
;* in ACSR) goes high. This is a more secure solution, since the interrupt
;* flag is polled. This allows the user to insert code within the wait loop
;* because hardware «remembers» pulses of shorter duration than the polling
;* interval. Another positive feature is that there is no need to wait for
;* a preceeding negative edge.
;* Number of words :5
;* Number of cycles :Inital setup :2
;* Flag clearing:1
;* Loop :4
;* Response time:3 – 5
;* Low registers used :None
;* High registers used :None
wait_edge2:
;***** ɂɧɢɰɢɚɥɢɡɚɰɢɹ ɪɟɠɢɦɚ ɩɪɟɪɵɜɚɧɢɹ, ɩɪɢ ɩɭɫɤɟ (reset) ACIE = 0
sbi ACSR,ACIS0
sbi ACSR,ACIS1 ;ɭɫɬɚɧɨɜɤɚ ɪɟɠɢɦɚ ɩɪɟɪɵɜɚɧɢɹ ɫ 0 ɜ 1
;***** Ɉɠɢɞɚɧɢɟ
sbi ACSR,ACI ;ɡɚɩɢɫɶ «1» ɜ ACI
we2_1:
sbis ACSR,ACI ;if ACI is low
rjmp we2_1
;****************** «ana_init» ****************************************
;* This code segment enables Analog Comparator Interrupt on output toggle.
;* The program then enters an infinite loop.
;* The 16–bit counter is cleared prior to enabling the interrupt.
;* Performance figures apply to interrupt initialization only.
;* Number of words :4
;* Number of cycles :5
;* Low registers used :None
;* High registers used :1 (temp)
80
;********************************************************************
*
ana_init:
;***** Ɉɛɧɭɥɟɧɢɟ 16-ɪɚɡɪɹɞɧɨɝɨ ɫɱɟɬɱɢɤɚ
clr cntL
clr cntH
;***** ɍɫɬɚɧɨɜɤɚ ɩɪɟɪɵɜɚɧɢɣ, ɬ. ɤ. ACIE = 0 ɩɨɫɥɟ ɩɭɫɤɚ
ldi temp,(ACI<<1) ;ɨɱɢɫɬɢɬɶ ɮɥɚɝ ɩɪɟɪɵɜɚɧɢɣ ɢ ACIS1/ACIS0...
out ACSR,temp ;...ɜɵɛɪɚɬɶ ɩɪɟɪɵɜɚɧɢɟ ɩɪɢ ɥɸɛ. ɢɡɦɟɧ. ɫɢɝ-ɥɚ ɧɚ ɜɵɯ.
ɤɨɦɩ–ɪɚ
sei ; ɪɚɡɪɟɲɢɬɶ ɝɥɨɛɚɥɶɧɵɟ ɩɪɟɪɵɜɚɧɢɹ
sbi ACSR,ACIE ;ɪɚɡɪɟɲɟɧɢɟ ɩɪɟɪɵɜɚɧɢɹ ɨɬ AC
forever:rjmp forever
ɉɨɪɹɞɨɤ ɜɵɩɨɥɧɟɧɢɹ ɥɚɛɨɪɚɬɨɪɧɨɣ ɪɚɛɨɬɵ
ɇɭɠɧɨ ɜɵɩɨɥɧɢɬɶ ɜɫɟ ɧɟɨɛɯɨɞɢɦɵɟ ɨɩɟɪɚɰɢɢ ɫ ɩɪɨɟɤɬɨɦ Lab_7.prj ɢ ɩɪɨ-
ɝɪɚɦɦɨɣ Lab7.asm ɜɫɪɟɞɟ VMLab.
ɋɨɞɟɪɠɚɧɢɟ ɨɬɱɟɬɚ
Ɉɬɱɟɬ ɩɨ ɩɪɨɞɟɥɚɧɧɨɣ ɥɚɛɨɪɚɬɨɪɧɨɣ ɪɚɛɨɬɟ ɞɨɥɠɟɧ ɫɨɞɟɪɠɚɬɶ:
ɫɬɪɭɤɬɭɪɧɭɸ ɫɯɟɦɭ ɚɥɝɨɪɢɬɦɚ ɩɪɨɝɪɚɦɦɵ ɧɚ ɥɚɛɨɪɚɬɨɪɧɭɸ ɪɚɛɨɬɭ;
ɫɯɟɦɭ ɷɥɟɤɬɪɢɱɟɫɤɭɸ ɩɪɢɧɰɢɩɢɚɥɶɧɭɸ ɪɚɡɪɚɛɨɬɚɧɧɨɝɨ ɭɫɬɪɨɣɫɬɜɚ;
ɬɟɤɫɬ ɩɪɨɝɪɚɦɦɵ ɧɚ ɹɡɵɤɟ ɚɫɫɟɦɛɥɟɪɚ (ɪɚɫɩɟɱɚɬɤɚ ɮɚɣɥɚ *asm);
ɪɚɫɩɟɱɚɬɤɚ ɮɚɣɥɚ ɩɪɨɟɤɬɚ (*.prj);
ɪɟɡɭɥɶɬɚɬɵ ɦɨɞɟɥɢɪɨɜɚɧɢɹ (ɨɤɧɨ VMLab ɫ ɡɚɩɭɳɟɧɧɨɣ ɩɪɨɝɪɚɦɦɨɣ ɢ
ɪɟɡɭɥɶɬɚɬɚɦɢ ɜɵɱɢɫɥɟɧɢɣ).
Ʉɨɧɬɪɨɥɶɧɵɟ ɜɨɩɪɨɫɵ
1. ȼɯɨɞɧɵɟ ɫɢɝɧɚɥɵ ɚɧɚɥɨɝɨɜɨɝɨ ɤɨɦɩɚɪɚɬɨɪɚ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ
ATmega16.
2. ɍɩɪɚɜɥɟɧɢɟ ɤɨɦɩɚɪɚɬɨɪɨɦ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ ATmega16.
3. Ɂɚɞɚɧɢɟ ɪɟɠɢɦɚ ɩɪɟɪɵɜɚɧɢɹ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ ATmega16.
4. ɂɫɬɨɱɧɢɤɢ ɜɯɨɞɧɵɯ ɫɢɝɧɚɥɨɜ ɚɧɚɥɨɝɨɜɨɝɨ ɤɨɦɩɚɪɚɬɨɪɚ ɜ ɦɢɤɪɨɤɨɧ-
ɬɪɨɥɥɟɪɟ ATmega16.
5. Ɋɚɡɪɟɲɟɧɢɟ ɜɯɨɞɚ ɡɚɯɜɚɬɚ ɬɚɣɦɟɪɨɦ AC ɜ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɟ ATmega16.
6. Ȼɢɬ ɪɚɡɪɟɲɟɧɢɹ ɩɪɟɪɵɜɚɧɢɹ ɜ AC ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ AVR ATmega16.
7. Ɏɥɚɝ ɩɪɟɪɵɜɚɧɢɹ ɜ AC ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ ATmega16.
8. Ȼɢɬ ɜɵɯɨɞɚ ɚɧɚɥɨɝɨɜɨɝɨ ɤɨɦɩɚɪɚɬɨɪɚ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ ATmega16.
9. Ȼɢɬ ɜɵɛɨɪɚ ɷɬɚɥɨɧɚ ɚɧɚɥɨɝɨɜɨɝɨ ɤɨɦɩɚɪɚɬɨɪɚ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ ATmega16.
10. Ȼɢɬ ɨɬɤɥɸɱɟɧɢɹ ɚɧɚɥɨɝɨɜɨɝɨ ɤɨɦɩɚɪɚɬɨɪɚ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ
ATmega16.
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