Микроконверторы фирмы Analog Devices в микропроцессорных приборных комплексах. Виноградов А.Б - 160 стр.

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160
OF1H DATA 0E5H ;AUX ADC OFFSET REGISTER
I2CCON DATA 0E8H ;I2C CONTROL
GN0L DATA 0E9H ;MAIN ADC GAIN REGISTER
GN0M DATA 0EAH ;MAIN ADC GAIN REGISTER
GN0H DATA 0EBH ;MAIN ADC GAIN REGISTER
GN1L DATA 0ECH ;AUX ADC GAIN REGISTER
GN1H DATA 0EDH ;AUX ADC GAIN REGISTER
B DATA 0F0H ;MULTIPLICATION REGISTER
SPIDAT DATA 0F7H ;SPI DATA REGISTER
SPICON DATA 0F8H ;SPI CONTROL REGISTER
DACL DATA 0FBH ;DAC LOW BYTE
DACH DATA 0FCH ;DAC HIGH BYTE
DACCON DATA 0FDH ;DAC CONTROL REGISTER
IT0 BIT 088H ;TCON.0 - EXT. INTERRUPT 0 TYPE
IE0 BIT 089H ;TCON.1 - EXT. INTERRUPT 0 EDGE FLAG
IT1 BIT 08AH ;TCON.2 - EXT. INTERRUPT 1 TYPE
IE1 BIT 08BH ;TCON.3 - EXT. INTERRUPT 1 EDGE FLAG
TR0 BIT 08CH ;TCON.4 - TIMER 0 ON/OFF CONTROL
TF0 BIT 08DH ;TCON.5 - TIMER 0 OVERFLOW FLAG
TR1 BIT 08EH ;TCON.6 - TIMER 1 ON/OFF CONTROL
TF1 BIT 08FH ;TCON.7 - TIMER 1 OVERFLOW FLAG
T2 BIT 090H ;P1.0 - TIMER 2 TRIGGER INPUT
T2EX BIT 091H ;P1.1 - TIMER 2 COUNT INPUT
RI BIT 098H ;SCON.0 - RECEIVE INTERRUPT FLAG
TI BIT 099H ;SCON.1 - TRANSMIT INTERRUPT FLAG
RB8 BIT 09AH ;SCON.2 - RECEIVE BIT 8
TB8 BIT 09BH ;SCON.3 - TRANSMIT BIT 8
REN BIT 09CH ;SCON.4 - RECEIVE ENABLE
SM2 BIT 09DH ;SCON.5 - SERIAL MODE CONTROL BIT 2
SM1 BIT 09EH ;SCON.6 - SERIAL MODE CONTROL BIT 1
SM0 BIT 09FH ;SCON.7 - SERIAL MODE CONTROL BIT 0
EX0 BIT 0A8H ;IE.0 - EXTERNAL INTERRUPT 0 ENABLE
ET0 BIT 0A9H ;IE.1 - TIMER 0 INTERRUPT ENABLE
EX1 BIT 0AAH ;IE.2 - EXTERNAL INTERRUPT 1 ENABLE
ET1 BIT 0ABH ;IE.3 - TIMER 1 INTERRUPT ENABLE
ES BIT 0ACH ;IE.4 - SERIAL PORT INTERRUPT ENABLE
ET2 BIT 0ADH ;IE.5 - TIMER 2 INTERRUPT ENABLE
EADC BIT 0AEH ;IE.6 - ENABLE ADC INTURRUPT
EA BIT 0AFH ;IE.7 - GLOBAL INTERRUPT ENABLE
RXD BIT 0B0H ;P3.0 - SERIAL PORT RECEIVE INPUT
TXD BIT 0B1H ;P3.1 - SERIAL PORT TRANSMIT OUTPUT
INT0 BIT 0B2H ;P3.2 - EXTERNAL INTERRUPT 0 INPUT
INT1 BIT 0B3H ;P3.3 - EXTERNAL INTERRUPT 1 INPUT
T0 BIT 0B4H ;P3.4 - TIMER 0 COUNT INPUT
T1 BIT 0B5H ;P3.5 - TIMER 1 COUNT INPUT
WR BIT 0B6H ;P3.6 - WRITE CONTROL FOR EXT. MEMORY
RD BIT 0B7H ;P3.7 - READ CONTROL FOR EXT. MEMORY
PX0 BIT 0B8H ;IP.0 - EXTERNAL INTERRUPT 0 PRIORITY
PT0 BIT 0B9H ;IP.1 - TIMER 0 PRIORITY
PX1 BIT 0BAH ;IP.2 - EXTERNAL INTERRUPT 1 PRIORITY
PT1 BIT 0BBH ;IP.3 - TIMER 1 PRIORITY
PS BIT 0BCH ;IP.4 - SERIAL PORT PRIORITY
PT2 BIT 0BDH ;IP.5 - TIMER 2 PRIORITY
PADC BIT 0BEH ;IP.6 - ADC PRIORITY
WDWR BIT 0C0H ;WDCON.0 - WATCHDOG WRITE ENABLE BIT
WDE BIT 0C1H ;WDCON.1 - WATCHDOG ENABLE
WDS BIT 0C2H ;WDCON.2 - WATCHDOG STATUS
WDIR BIT 0C3H ;WDCON.3 - WATCHDOG INTERRUPT RESPONSE BIT
PRE0 BIT 0C4H ;WDCON.4 - WATCHDOG TIMEOUT SELECTION BIT0
PRE1 BIT 0C5H ;WDCON.5 - WATCHDOG TIMEOUT SELECTION BIT1
PRE2 BIT 0C6H ;WDCON.6 - WATCHDOG TIMEOUT SELECTION BIT2
PRE3 BIT 0C7H ;WDCON.7 - WATCHDOG TIMEOUT SELECTION BIT3
CAP2 BIT 0C8H ;T2CON.0 - CAPTURE OR RELOAD SELECT
CNT2 BIT 0C9H ;T2CON.1 - TIMER OR COUNTER SELECT
TR2 BIT 0CAH ;T2CON.2 - TIMER 2 ON/OFF CONTROL
EXEN2 BIT 0CBH ;T2CON.3 - TIMER 2 EXTERNAL ENABLE FLAG
TCLK BIT 0CCH ;T2CON.4 - TRANSMIT CLOCK SELECT
RCLK BIT 0CDH ;T2CON.5 - RECEIVE CLOCK SELECTT

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