Техника микропроцессорных систем в коммутации. Проектирование микропроцессорных систем на базе микроконтроллеров AVR фирмы Atmel. Горохин В.Н. - 9 стр.

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17
Ⱦɚɥɶɧɟɣɲɚɹ ɨɬɥɚɞɤɚ ɩɪɨɝɪɚɦɦɵ ɨɫɭɳɟɫɬɜɥɹɟɬɫɹ ɩɪɢ ɟɟ ɡɚɩɭɫɤɟ ɜ ɚɜɬɨɦɚ-
ɬɢɱɟɫɤɨɦ ɢɥɢ ɩɨɲɚɝɨɜɨɦ ɪɟɠɢɦɟ ɪɢɫ. 10.
Ⱦɥɹ ɡɚɩɭɫɤɚ ɫɨɡɞɚɧɧɨɣ ɢ ɨɬɤɨɦɩɢɥɢɪɨɜɚɧɧɨɣ ɩɪɨɝɪɚɦɦɵ ɢɫɩɨɥɶɡɭɟɬɫɹ ɤɨ-
ɦɚɧɞɚ GO/Continur ɜ ɦɟɧɸ Run ɢɥɢ ɜ ɩɨɲɚɝɨɜɨɦ ɪɟɠɢɦɟ ɤɨɦɚɧɞɵ Step.
ɉɪɨɝɪɚɦɦɚ ɜɜɨɞɢɬ ɱɟɪɟɡ UART ɱɢɫɥɚ X ɢ Y ɜɤɨɞɟ ASCII. ȼ ɩɨɤɚɡɚɧɧɨɦ
ɩɪɢɦɟɪɟ X=2 Y=3, ɩɨɫɥɟ ɜɵɱɢɫɥɟɧɢɹ 9*X+2*Y–28, ɪɟɡɭɥɶɬɚɬ ɜɵɜɨɞɢɬɫɹ ɜ
UART ɜɤɨɞɟ ASCII ɜ ɜɢɞɟ ɞɜɭɯɡɧɚɱɧɨɝɨ ɞɟɫɹɬɢɱɧɨɝɨ ɱɢɫɥɚ, ɜɵɜɨɞɢɬɫɹ ɦɢɧɭɫ,
ɟɫɥɢ ɪɟɡɭɥɶɬɚɬ – ɨɬɪɢɰɚɬɟɥɶɧɨɟ ɱɢɫɥɨ.
Ⱦɥɹ ɧɚɛɥɸɞɟɧɢɹ ɡɚ ɢɡɦɟɧɟɧɢɹɦɢ ɩɟɪɟɦɟɧɧɵɯ ɦɨɠɧɨ ɢɫɩɨɥɶɡɨɜɚɬɶ ɨɤɧɨ
Watch.
Ɋɢɫ. 10. Ɉɤɧɚ ɩɪɢ ɡɚɩɭɫɤɟ ɩɪɨɝɪɚɦɦɵ
Ⱦɥɹ ɩɪɨɫɦɨɬɪɚ ɩɪɨɝɪɚɦɦɧɨɝɨ ɫɱɟɬɱɢɤɚ, ɭɤɚɡɚɬɟɥɹ ɫɬɟɤɚ, ɫɨɞɟɪɠɢɦɨɝɨ ɪɟ-
ɝɢɫɬɪɚ ɫɬɚɬɭɫɚ SREG ɢ ɢɧɞɟɤɫɧɵɯ ɪɟɝɢɫɬɪɨɜ X, E ɢ Z, ɩɚɦɹɬɢ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪ
ɢ ɞɪɭɝɢɯ ɪɟɝɢɫɬɪɨɜ, ɚ ɬɚɤɠɟ ɫɨɫɬɨɹɧɢɹ ɩɨɪɬɨɜ ɜɜɨɞɚ/ɜɵɜɨɞɚ ɢ ɩɟɪɢɮɟɪɢɣɧɵɯ
ɭɫɬɪɨɣɫɬɜ ɱɟɪɟɡ ɢɯ ɪɟɝɢɫɬɪɵ ɜ ɩɪɨɰɟɫɫɟ ɨɬɥɚɞɤɢ ɩɪɨɝɪɚɦɦɵ ɦɨɠ-
ɧɨ ɜɨɫɩɨɥɶɡɨɜɚɬɶɫɹ ɫɨɨɬɜɟɬɫɬɜɭɸɳɢɦɢ ɤɨɦɩɨɧɟɧɬɚɦɢ ɨɤɧɚ VMLab.
18
Ɂɚɞɚɧɢɟ ɤ ɥɚɛɨɪɚɬɨɪɧɨɣ ɪɚɛɨɬɟ
ɋɬɭɞɟɧɬ ɫɚɦɨɫɬɨɹɬɟɥɶɧɨ ɨɫɜɚɢɜɚɟɬ ɜɫɟ ɨɫɧɨɜɧɵɟ ɷɬɚɩɵ ɪɚɡɪɚɛɨɬɤɢ ɢ ɨɬ-
ɥɚɞɤɢ ɩɪɨɝɪɚɦɦ ɜ ɫɪɟɞɟ VMLab, ɪɚɫɫɦɨɬɪɟɧɧɵɟ ɪɚɧɟɟ.
ȼ ɤɚɱɟɫɬɜɟ ɩɪɢɦɟɪɚ ɢɫɩɨɥɶɡɭɸɬɫɹ ɮɚɣɥɵ Lab1.asm ɢ Lab_1.prj.
Ɏɚɣɥ Lab_1.prj
.MICRO "ATmega16"
.PROGRAM "lab1.asm"
.TARGET "lab_1.hex"
.TRACE ; Activate micro trace
; Following lines are optional; if not included
X1 TTY(4800 8) PD0 PD1
.plot V(PD0) v(PD1)
.POWER VDD=5 VSS=0 ; Power nodes
.CLOCK 1meg ; Micro clock
.STORE 250m ; Trace (micro+signals) storage time
Ɏɚɣɥ Lab1.asm
.include "C:\VMLAB\include\m16def.inc"
.def tmp = r16
.def X = r17
.def Y = r18
.def flag = r20 ; ɪɟɝ. ɮɥɚɝɨɜ, ɡɧɚɱɟɧɢɹ ɛɢɬɨɜ ɛɭɞɭɬ ɨɩɪɟɞɟɥɹɬɶ ɜɟɬɜɥɟɧɢɹ ɜ
: ɩɪɨɝɪɚɦɦɟ 0 ɛɢɬ – ɡɚɜɟɪɲɟɧɢɟ ɩɪɨɝɪɚɦɦɵ
; 1 ɛɢɬ – ɩɨɥɭɱɟɧɨ ɱɢɫɥɨ X
.def result = r21
.cseg ; ɧɚɱɚɥɨ ɫɟɝɦɟɧɬɚ ɩɪɨɝɪɚɦɦɵ
.org $0 ; ɭɫɬɚɧɨɜɤɚ ɫɱɟɬɱɢɤɚ ɚɞɪɟɫɚ ɧɚ 0
; ɨɛɪɚɛɨɬɤɚ ɩɪɟɪɵɜɚɧɢɣ
rjmp start
.org URXCaddr
rjmp uart_rx
.org UDREaddr
reti
.org UTXCaddr
reti
; ɧɚɱɚɥɨ ɩɪɨɝɪɚɦɦɵ
uart_rx: ; ɉɉ ɨɛɪɚɛɨɬɤɢ ɩɪɟɪɵɜɚɧɢɹ –
;ɩɨɥɭɱɟɧɢɟ ɫɢɦɜɨɥɚ ɜ UART
in tmp, UDR ; ɱɬɟɧɢɟ ɡɧɚɱɟɧɢɹ ɢɡ ɪɟɝɢɫɬɪɚ ɞɚɧɧɵɯ
subi tmp, $30 ; UART ɧɚɫɬɪɨɟɧ ɧɚ ɪɚɛɨɬɭ ɩɨ ɭɦɨɥɱɚɧɢɸ, ɩɨɷɬɨɦɭ
; ɩɪɟɨɛɪɚɡɨɜɵɜɚɟɦ ɩɨɫɬɭɩɚɸɳɢɣ ɫɢɦɜɨɥ

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