Техника микропроцессорных систем в коммутации. Проектирование микропроцессорных систем на базе микроконтроллеров AVR фирмы Atmel. Горохин В.Н. - 11 стр.

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21
ldi tmp, $30
add X, tmp
add Y, tmp
out UDR, X
wait: ; ɠɞɟɦ, ɩɨɤɚ ɡɚɜɟɪɲɢɬɫɹ ɜɵɜɨɞ ɱɢɫɥɚ X
in tmp, UCSRA
sbrs tmp, 5
rjmp wait
out UDR, Y
rjmp forever
ɉɪɨɝɪɚɦɦɚ «Lab1.asm» ɨɫɭɳɟɫɬɜɥɹɟɬ ɜɜɨɞ ɫɢɦɜɨɥɨɜ (ɞɜɭɯ ɱɢɫɟɥ ɨɬ 0 ɞɨ 9
ɤɚɠɞɵɣ) ɱɟɪɟɡ COM ɩɨɪɬ (UART, S232), ɪɟɡɭɥɶɬɚɬ ɜɵɱɢɫɥɟɧɢɹ ɬɚɤɠɟ ɜɵɜɨɞɢɬ-
ɫɹ ɱɟɪɟɡ ɷɬɨɬ ɠɟ ɢɧɬɟɪɮɟɣɫ.
ɉɨɪɹɞɨɤ ɜɵɩɨɥɧɟɧɢɹ ɥɚɛɨɪɚɬɨɪɧɨɣ ɪɚɛɨɬɵ
ɇɟɨɛɯɨɞɢɦɨ ɜɵɩɨɥɧɢɬɶ ɜɫɟ ɧɟɨɛɯɨɞɢɦɵɟ ɨɩɟɪɚɰɢɢ ɫ ɩɪɨɟɤɬɨɦ Lab_1.prj ɢ
ɩɪɨɝɪɚɦɦɨɣ Lab1.asm ɜɫɪɟɞɟ VMLab.
ɋɨɞɟɪɠɚɧɢɟ ɨɬɱɟɬɚ
Ɉɬɱɟɬ ɩɨ ɩɪɨɞɟɥɚɧɧɨɣ ɥɚɛɨɪɚɬɨɪɧɨɣ ɪɚɛɨɬɟ ɞɨɥɠɟɧ ɫɨɞɟɪɠɚɬɶ:
ɫɬɪɭɤɬɭɪɧɭɸ ɫɯɟɦɭ ɚɥɝɨɪɢɬɦɚ ɩɪɨɝɪɚɦɦɵ ɧɚ ɥɚɛɨɪɚɬɨɪɧɭɸ ɪɚɛɨɬɭ;
ɫɯɟɦɭ ɷɥɟɤɬɪɢɱɟɫɤɭɸ ɩɪɢɧɰɢɩɢɚɥɶɧɭɸ ɪɚɡɪɚɛɨɬɚɧɧɨɝɨ ɭɫɬɪɨɣɫɬɜɚ;
ɬɟɤɫɬ ɩɪɨɝɪɚɦɦɵ ɧɚ ɹɡɵɤɟ AVR Ⱥɫɫɟɦɛɥɟɪɟ (ɪɚɫɩɟɱɚɬɤɚ ɮɚɣɥɚ *asm);
ɪɚɫɩɟɱɚɬɤɚ ɮɚɣɥɚ ɩɪɨɟɤɬɚ (*.prj);
ɪɟɡɭɥɶɬɚɬɵ ɦɨɞɟɥɢɪɨɜɚɧɢɹ (ɨɤɧɨ VMLab ɫ ɡɚɩɭɳɟɧɧɨɣ ɩɪɨɝɪɚɦɦɨɣ ɢ
ɪɟɡɭɥɶɬɚɬɚɦɢ ɜɵɱɢɫɥɟɧɢɣ).
Ʉɨɧɬɪɨɥɶɧɵɟ ɜɨɩɪɨɫɵ
1. ɉɟɪɟɱɢɫɥɢɬɟ ɨɫɧɨɜɧɵɟ ɷɬɚɩɵ ɪɚɛɨɬɵ ɜ ɩɪɨɝɪɚɦɦɟ VMLab?
2. Ʉɚɤɢɟ ɬɢɩɵ ɮɚɣɥɨɜ ɫɨɡɞɚɸɬɫɹ ɜ ɩɪɨɝɪɚɦɦɟ VMLab?
3. Ʉɚɤɢɟ ɤɨɦɩɨɧɟɧɬɵ ɢɫɩɨɥɶɡɭɸɬɫɹ ɫɨɜɦɟɫɬɧɨ ɫ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɨɦ?
4. Ʉɚɤɢɟ ɞɨɩɨɥɧɢɬɟɥɶɧɵɟ ɨɤɧɚ ɢɫɩɨɥɶɡɭɸɬɫɹ ɞɥɹ ɩɪɨɫɦɨɬɪɚ ɢ ɭɩɪɚɜɥɟɧɢɹ
ɫɢɫɬɟɦɨɣ ɧɚ ɨɫɧɨɜɟ ɜɵɛɪɚɧɧɨɝɨ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ?
5. Ʉɚɤɢɦ ɨɛɪɚɡɨɦ ɦɨɠɧɨ ɩɪɨɫɦɨɬɪɟɬɶ ɧɚɩɪɹɠɟɧɢɹ ɜ ɡɚɜɢɫɢɦɨɫɬɢ ɨɬ ɜɪɟ-
ɦɟɧɢ (ɜɪɟɦɟɧɧɵɟ ɞɢɚɝɪɚɦɦɵ)?
22
Ʌɚɛɨɪɚɬɨɪɧɚɹ ɪɚɛɨɬɚ ʋ 2
ɉɊɈȽɊȺɆɆȺ ȼȼɈȾȺ ɋ UART
ɂ ȼɕȼɈȾȺ ȼ LCD ɆɈȾɍɅɖ
ɐɟɥɶ ɪɚɛɨɬɵ: ɂɡɭɱɟɧɢɟ ɢ ɨɫɜɨɟɧɢɟ ɭɩɪɚɜɥɟɧɢɹ ɩɟɪɢɮɟɪɢɣɧɵɦ ɭɫɬɪɨɣɫɬ-
ɜɨɦ ɜɜɨɞɚ/ɜɵɜɨɞɚ – LCD ɦɨɞɭɥɟɦ, ɩɨɞɤɥɸɱɟɧɧɵɦ ɤ AVR ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɭ
ɮɢɪɦɵ Atmel, ɚ ɬɚɤɠɟ ɞɚɥɶɧɟɣɲɟɟ ɢɡɭɱɟɧɢɟ ɫɢɫɬɟɦɵ ɤɨɦɚɧɞ ɢ ɫɢɫɬɟɦɵ ɩɪɟɪɵ-
ɜɚɧɢɣ.
Ʉɪɚɬɤɢɟ ɬɟɨɪɟɬɢɱɟɫɤɢɟ ɫɜɟɞɟɧɢɹ
ɋɢɫɬɟɦɚ ɩɪɟɪɵɜɚɧɢɣ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɚ ATmega16
ȼ ATmega16 ɩɪɟɞɭɫɦɨɬɪɟɧ 21 ɢɫɬɨɱɧɢɤ ɩɪɟɪɵɜɚɧɢɣ. ɉɨɥɧɵɣ ɫɩɢɫɨɤ ɜɟɤ-
ɬɨɪɨɜ ɩɪɟɪɵɜɚɧɢɣ ɩɪɢɜɟɞɟɧ ɜ ɬɚɛɥɢɰɟ 3.
Ɍɚɛɥɢɰɚ 3. ɋɛɪɨɫ ɢ ɜɟɤɬɨɪɵ ɩɪɟɪɵɜɚɧɢɣ
ɇɨɦɟɪ
ɜɟɤɬɨɪɚ
Ⱥɞɪɟɫ ɂɫɬɨɱɧɢɤ Ɉɩɢɫɚɧɢɟ ɩɪɟɪɵɜɚɧɢɹ
1 2 3 4
1 $000 RESET ȼɵɜɨɞ ɫɛɪɨɫɚ ɢ ɫɛɪɨɫ ɨɬ ɫɬ. ɬɚɣɦɟɪɚ
2 $002 INT0 ȼɧɟɲɧɟɟ ɩɪɟɪɵɜɚɧɢɟ 0
3 $004 INT1 ȼɧɟɲɧɟɟ ɩɪɟɪɵɜɚɧɢɟ 1
4 $006 TIMER2
COMP
ɋɨɜɩɚɞɟɧɢɟ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 2
5 $008 TIMER2 OVF ɉɟɪɟɩɨɥɧɟɧɢɟ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 2
6 $00A TIMER1 CAPT Ɂɚɯɜɚɬ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 1
7 $00ɋ TIMER1
COMPA
ɋɨɜɩɚɞɟɧɢɟ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 1
8 $00E TIMER1
COMPB
ɋɨɜɩɚɞɟɧɢɟ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 1
9 $010 TIMER1 OVF ɉɟɪɟɩɨɥɧɟɧɢɟ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 1
10 $012 TIMER0 OVF ɉɟɪɟɩɨɥɧɟɧɢɹ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 0
11 $014 SPI, STC ɉɨɥɧɚɹ ɩɨɫɥɟɞɨɜɚɬɟɥɶɧɚɹ ɩɟɪɟɞɚɱɚ
12 $016 USART, RXC Usart, Rx complete
13 $018 USART, UDRE Usart ɪɟɝɢɫɬɪ ɞɚɧɧɵɯ ɩɭɫɬɨɣ
14 $01A USART, TXC Usart, Tx complete
15 $01C ADC Ⱥɧɚɥɨɝɨ-ɰɢɮɪɨɜɨɣ ɩɪɟɨɛɪɚɡɨɜɚɬɟɥɶ
16 $01E EE_RDY EEPROM Ready
17 $020 ANA_COMP Ⱥɧɚɥɨɝɨɜɵɣ ɤɨɦɩɚɪɚɬɨɪ
18 $022 TWI Ⱦɜɭɯɩɪɨɜɨɞɧɨɣ ɩɨɫɥɟɞɨɜɚɬɟɥɶɧɵɣ ɢɧ-
ɬɟɪɮɟɣɫ
19 $024 INT2 ȼɧɟɲɧɟɟ ɩɪɟɪɵɜɚɧɢɟ 2
20 $026 TIMER0
COMP
ɋɨɜɩɚɞɟɧɢɟ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 0
21 $028 SPM_RDY Ɂɚɝɪɭɡɤɚ ɩɪɨɝɪɚɦɦɧɨɣ ɩɚɦɹɬɢ ɝɨɬɨɜɚ

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