Техника микропроцессорных систем в коммутации. Проектирование микропроцессорных систем на базе микроконтроллеров AVR фирмы Atmel. Горохин В.Н. - 12 стр.

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23
ɑɚɳɟ ɜɫɟɝɨ ɢɫɩɨɥɶɡɭɟɬɫɹ ɫɥɟɞɭɸɳɚɹ ɭɫɬɚɧɨɜɤɚ ɜɟɤɬɨɪɨɜ ɩɪɟɪɵɜɚɧɢɣ ɜ
ɩɪɨɝɪɚɦɦɟ:
Ⱥɞɪɟɫ Ɇɟɬɤɚ Ʉɨɞ Ʉɨɦɦɟɧɬɚɪɢɣ
$000 jmp RESET ; Reset Handler
$002 jmp EXT_INT0 ; IRQ0 Handler
$004 jmp EXT_INT1 ; IRQ1 Handler
$006 jmp TIM2_COMP ; Timer2 Compare Handler
$008 jmp TIM2_OVF ; Timer2 Overflow Handler
$00A jmp TIM1_CAPT ; Timer1 Capture Handler
$00C jmp TIM1_COMPA ; Timer1 CompareA Handler
$00E jmp TIM1_COMPB ; Timer1 CompareB Handler
$010 jmp TIM1_OVF ; Timer1 Overflow Handler
$012 jmp TIM0_OVF ; Timer0 Overflow Handler
$014 jmp SPI_STC ; SPI Transfer Complete Handler
$016 jmp USART_RXC ; USART RX Complete Handler
$018 jmp USART_UDRE ; UDR Empty Handler
$01A jmp USART_TXC ; USART TX Complete Handler
$01C jmp ADC ; ADC Conversion Complete
Handler
$01E jmp EE_RDY ; EEPROM Ready Handler
$020 jmp ANA_COMP ; Analog Comparator Handler
$022 jmp TWSI ; Two–wire Serial Interface Han-
dler
$024 jmp EXT_INT2 ; IRQ2 Handler
$026 jmp TIM0_COMP ; Timer0 Compare Handler
$028 jmp SPM_RDY ; Store Program Memory Ready Handler
;ɇɚɱɚɥɨ ɩɪɨɝɪɚɦɦɵ, ɢɧɢɰɢɚɥɢɡɚɰɢɹ ɫɬɟɤɚ, ɝɥɨɛ. ɪɚɡɪɟɲɟɧɢɟ ɩɪɟɪɵɜɚɧɢɣ
$02A RESET: ldi r16,high(RAMEND ) ; Main program start
$02B out SPH,r16 ; Set Stack Pointer to top of RAM
$02C ldi r16,low(RAMEND)
$02D out SPL,r16
$02E sei ; Enable interrupts
;ɂɧɫɬɪɭɤɰɢɢ ɩɪɨɝɪɚɦɦɵ
$02F <instr> xxx
... ... ...
Ɉɛɪɚɛɨɬɤɚ ɩɪɟɪɵɜɚɧɢɣ
ȼ ɦɢɤɪɨɤɨɧɬɪɨɥɥɟɪɟ ATmega16 ɪɟɝɢɫɬɪ ɭɩɪɚɜɥɟɧɢɹ ɩɪɟɪɵɜɚɧɢɟɦ GIɋR –
ɨɛɳɢɣ ɪɟɝɢɫɬɪ ɭɩɪɚɜɥɟɧɢɹ ɩɪɟɪɵɜɚɧɢɹ ɬɚɛɥ. 4, ɪɟɝɭɥɢɪɭɟɬ ɪɚɡɦɟɳɟɧɢɟ ɜɟɤɬɨɪɚ
ɩɪɟɪɵɜɚɧɢɹ [8]. Ʉɨɝɞɚ ɜɨɡɧɢɤɚɟɬ ɩɪɟɪɵɜɚɧɢɟ, ɨɛɳɢɣ ɛɢɬ ɪɚɡɪɟɲɟɧɢɹ ɩɪɟɪɵɜɚ-
ɧɢɣ I ɨɱɢɳɚɟɬɫɹ (ɧɨɥɶ) ɢ ɩɪɟɪɵɜɚɧɢɹ ɡɚɩɪɟɳɚɸɬɫɹ. ɉɪɨɝɪɚɦɦɚ ɩɨɥɶɡɨɜɚɬɟɥɹ
ɦɨɠɟɬ ɭɫɬɚɧɨɜɢɬɶ ɷɬɨɬ ɛɢɬ ɞɥɹ ɪɚɡɪɟɲɟɧɢɹ ɩɪɟɪɵɜɚɧɢɣ. Ɏɥɚɝ ɪɚɡɪɟɲɟɧɢɹ ɩɪɟ-
ɪɵɜɚɧɢɣ I ɭɫɬɚɧɚɜɥɢɜɚɟɬɫɹ ɜ 1 ɩɪɢ ɜɵɩɨɥɧɟɧɢɢ ɤɨɦɚɧɞɵ ɜɵɯɨɞɚ ɢɡ ɩɪɟɪɵɜɚɧɢɹ
– RETI.
24
Ⱦɥɹ ɩɪɟɪɵɜɚɧɢɣ, ɜɤɥɸɱɚɟɦɵɯ ɫɬɚɬɢɱɟɫɤɢɦɢ ɫɨɛɵɬɢɹɦɢ, ɮɥɚɝ ɩɪɟɪɵɜɚɧɢɹ
ɜɡɜɨɞɢɬɫɹ, ɤɨɝɞɚ ɩɪɨɢɫɯɨɞɢɬ ɫɨɛɵɬɢɟ. ȿɫɥɢ ɮɥɚɝ ɩɪɟɪɵɜɚɧɢɹ ɨɱɢɳɟɧ ɢ ɩɪɢɫɭɬ-
ɫɬɜɭɟɬ ɭɫɥɨɜɢɟ ɜɨɡɧɢɤɧɨɜɟɧɢɹ ɩɪɟɪɵɜɚɧɢɹ, ɮɥɚɝ ɧɟ ɛɭɞɟɬ ɭɫɬɚɧɨɜɥɟɧ, ɩɨɤɚ ɧɟ
ɩɪɨɢɡɨɣɞɟɬ ɫɥɟɞɭɸɳɟɟ ɫɨɛɵɬɢɟ.
Ʉɨɝɞɚ ɩɪɨɝɪɚɦɦɧɵɣ ɫɱɟɬɱɢɤ ɭɫɬɚɧɚɜɥɢɜɚɟɬɫɹ ɧɚ ɬɟɤɭɳɢɣ ɜɟɤɬɨɪ ɩɪɟ-
ɪɵɜɚɧɢɹ ɞɥɹ ɨɛɪɚɛɨɬɤɢ ɩɪɟɪɵɜɚɧɢɹ, ɫɨɨɬɜɟɬɫɬɜɭɸɳɢɣ ɮɥɚɝ, ɫɝɟɧɟɪɢɪɨɜɚɧɧɵɣ
ɩɪɟɪɵɜɚɧɢɟɦ, ɚɩɩɚɪɚɬɧɨ ɫɛɪɚɫɵɜɚɟɬɫɹ. ɇɟɤɨɬɨɪɵɟ ɮɥɚɝɢ ɩɪɟɪɵɜɚɧɢɹ ɦɨɝɭɬ
ɛɵɬɶ ɫɛɪɨɲɟɧɵ ɡɚɩɢɫɶɸ ɥɨɝɢɱɟɫɤɨɣ ɟɞɢɧɢɰɵ ɜ ɛɢɬ, ɫɨɨɬɜɟɬɫɬɜɭɸɳɢɣ ɮɥɚɝɭ.
Ɍɚɛɥ. 4. Ɋɟɝɢɫɬɪ GICR
7 6 5 4 3 2 1 0
INT1 INT0 INT2 – – – IVSEL IVCE
R/W R/W R R R R R/W R/W
Ȼɢɬ
ɑɬ./ɡɚɩ.
ɇɚɱ. ɡɧɚɱ.
0 0 0 0 0 0 0 0
Ȼɢɬ 1 – IVSEL: ȼɵɛɨɪ ɜɟɤɬɨɪɚ ɩɪɟɪɵɜɚɧɢɹ.
Ȼɢɬ 0 – IVCE: ȼɟɤɬɨɪɧɨɟ ɢɡɦɟɧɟɧɢɟ ɩɪɟɪɵɜɚɧɢɹ.
ȼ ɬɚɛɥɢɰɟ 5 ɩɪɟɞɫɬɚɜɥɟɧɚ ɫɬɪɭɤɬɭɪɚ ɪɟɝɢɫɬɪɚ, ɪɟɠɢɦɵ ɭɩɪɚɜɥɟɧɢɹ ɢ ɧɚ-
ɱɚɥɶɧɵɟ ɡɧɚɱɟɧɢɹ ɪɚɡɪɹɞɨɜ ɪɟɝɢɫɬɪɚ ɨɛɳɟɝɨ ɪɟɝɢɫɬɪɚ ɮɥɚɝɨɜ GIFR.
Ɍɚɛɥ. 5. Ɋɟɝɢɫɬɪ GIFR
7 6 5 4 3 2 1 0
INTF1 INTF0 INTF2 – – – – –
R/W R/W R R R R R R
Ȼɢɬ
ɑɬ./ɡɚɩ.
(R/W)
ɇɚɱ.ɡɧɚɱ.
0 0 0 0 0 0 0 0
Ȼɢɬ 7 – INTF1: Ɏɥɚɝ ɜɧɟɲɧɟɝɨ ɩɪɟɪɵɜɚɧɢɹ 1.
Ȼɢɬ 6 – INTF0: Ɏɥɚɝ ɜɧɟɲɧɟɝɨ ɩɪɟɪɵɜɚɧɢɹ 0.
Ȼɢɬ 5 – INTF2: Ɏɥɚɝ ɜɧɟɲɧɟɝɨ ɩɪɟɪɵɜɚɧɢɹ 2.
ȼ ɬɚɛɥɢɰɟ 6 ɩɪɟɞɫɬɚɜɥɟɧɚ ɫɬɪɭɤɬɭɪɚ ɪɟɝɢɫɬɪɚ, ɪɟɠɢɦɵ ɭɩɪɚɜɥɟɧɢɹ ɢ ɧɚ-
ɱɚɥɶɧɵɟ ɡɧɚɱɟɧɢɹ ɪɚɡɪɹɞɨɜ ɪɟɝɢɫɬɪɚ TIMSK.
Ɍɚɛɥ. 6. Ɋɟɝɢɫɬɪ TIMSK
7 6 5 4 3 2 1 0
OCIE2 TOIE2 TICIE1 OCIE1
A
OCIE1
B
TOIE1 OCIE0 TOIE0
R/W R/W R R R/W R R/W R
Ȼɢɬ
ɑɬ./ɡɚɩ.
ɇɚɱ. ɡɧɚɱ.
0 0 0 0 0 0 0 0
Ȼɢɬ 7 – OCIE2: Ɋɚɡɪɟɲɟɧɢɟ ɩɪɟɪɵɜɚɧɢɹ ɩɨ ɫɨɜɩɚɞɟɧɢɸ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 2.
Ȼɢɬ 6 – TOIE2: Ɋɚɡɪɟɲɟɧɢɟ ɩɪɟɪɵɜɚɧɢɹ ɩɨ ɩɟɪɟɩɨɥɧɟɧɢɸ ɬɚɣɦɟɪɚ/ɫɱɟɬɱɢɤɚ 2.
Ȼɢɬ 5 – TICIE1: Ɋɚɡɪɟɲɟɧɢɟ ɩɪɟɪɵɜɚɧɢɹ ɩɨ ɜɯɨɞɭ ɡɚɯɜɚɬɚ.

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