Операционное устройство. Хлуденев А.В. - 47 стр.

                             Приложение Г
                             (справочное)
                VHDL-модель управляющего автомата Мили

     -- Mealy State Machines

     library ieee;
     use ieee.std_logic_1164.all;
     use ieee.numeric_std.all;

     entity UA is
      port(
         x1, x2 : in std_logic;
            ck, reset : in std_logic;
         y1, y2, y3, y4 : out std_logic );
     end UA;

     architecture behavior of UA is
      type state_type is (s0, s1, s2, s3, s4);
      signal current_state, next_state : state_type;
      signal iy1, iy2, iy3, iy4 : std_logic;

     begin
      -- register block
      process (ck, reset)
      begin
         if reset = '1' then
           current_state <= s0;
         elsif ck = '1' and ck'event then
           current_state <= next_state;
           y1 <= iy1 after 2 ns;
           y2 <= iy2 after 2 ns;
           y3 <= iy3 after 2 ns;
           y4 <= iy4 after 2 ns;
         end if;
      end process;

      -- state machine process
      process (current_state, x1, x2)
      begin
       -- default outputs
       iy1 <= '0';
       iy2 <= '0';
       iy3 <= '0';
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